发明名称 DIGITAL DUTY CYCLE CORRECTION CIRCUIT
摘要 A digital duty cycle correction circuit includes a duty cycle controller, a monitor, a voltage-frequency converter, a frequency counter, and a digital state machine. The duty cycle controller generates a first output clock signal and a second output clock signal by compensating a duty cycle of a first input clock signal and a duty cycle of a second input clock signal based on a digital duty control code. The monitor generates a first DC voltage and a second DC voltage by monitoring the first and second output clock signals. The voltage-frequency converter generates a first frequency signal, a second frequency signal, and a reference frequency signal by performing a voltage-frequency conversion on the first DC voltage, the second DC voltage, and a reference voltage. The frequency counter generates a first count value, a second count value, and a reference count value by counting pulses of the first and second frequency signals and pulses of the reference frequency signal. The digital state machine generates the digital duty control code based on the first count value, the second count value, and the reference count value.
申请公布号 KR20140112927(A) 申请公布日期 2014.09.24
申请号 KR20130027626 申请日期 2013.03.15
申请人 SAMSUNG ELECTRONICS CO., LTD. 发明人 LEE, CHEON OH;KIM, TAE PYEONG;CHOI, JUNG MYUNG;KIM, SUNG JUN;SONG, HO BIN;LIM, HAN KYUL
分类号 G11C7/22;G11C5/14 主分类号 G11C7/22
代理机构 代理人
主权项
地址