发明名称 Three dimensional memory structure
摘要 A Three-Dimensional Structure (3DS) Memory allows for physical separation of the memory circuits and the control logic circuit onto different layers such that each layer may be separately optimized. One control logic circuit suffices for several memory circuits, reducing cost. Fabrication of 3DS memory involves thinning of the memory circuit to less than 50 microns in thickness and bonding the circuit to a circuit stack while still in wafer substrate form. Fine-grain high density inter-layer vertical bus connections are used. The 3DS memory manufacturing method enables several performance and physical size efficiencies, and is implemented with established semiconductor processing techniques.
申请公布号 US8841778(B2) 申请公布日期 2014.09.23
申请号 US201313963149 申请日期 2013.08.09
申请人 发明人 Leedy Glenn J
分类号 H01L23/48;H01L25/065;H01L27/06;G11C5/02;H01L23/522;G11C5/06;H01L21/768;H01L27/108 主分类号 H01L23/48
代理机构 Useful Arts IP 代理人 Useful Arts IP
主权项 1. A circuit layer comprising: a semiconductor substrate that is of one piece and monocrystalline; interconnect conductors passing vertically through the semiconductor substrate; and silicon-based dielectric insulators passing vertically through the semiconductor substrate around the vertical interconnect conductors, the silicon-based dielectric insulators having a stress of less than 5×108 dynes/cm2 tensile.
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