发明名称 Chip package and a method for manufacturing a chip package
摘要 A chip package is provided, the chip package including: first encapsulation structure; first passivation layer formed over first encapsulation structure and first electrically conductive layer formed over first passivation layer; at least one chip arranged over first electrically conductive layer and passivation layer wherein at least one chip contact pad contacts first electrically conductive layer; at least one cavity formed in first encapsulation structure, wherein at least one cavity exposes a portion of first passivation layer covering at least one chip contact pad; second encapsulation structure disposed over first encapsulation structure and covering at least one cavity, wherein a chamber region over at least one chip contact pad is defined by at least one cavity and second encapsulation structure; wherein second encapsulation structure includes an inlet and outlet connected to chamber region, wherein inlet and outlet control an inflow and outflow of heat dissipating material to and from chamber region.
申请公布号 US8841768(B2) 申请公布日期 2014.09.23
申请号 US201213555248 申请日期 2012.07.23
申请人 Infineon Technologies AG 发明人 Von Koblinski Carsten;Knabl Michael;Meyer Ursula;Santos Rodriguez Francisco Javier;Breymesser Alexander;Brockmeier Andre
分类号 H01L23/48 主分类号 H01L23/48
代理机构 代理人
主权项 1. A chip package, comprising: a first encapsulation structure; a first passivation layer formed over the first encapsulation structure and a first electrically conductive layer formed over the first passivation layer; at least one chip arranged over the first electrically conductive layer and the first passivation layer wherein at least one chip contact pad contacts the first electrically conductive layer; at least one cavity formed in the first encapsulation structure, wherein the at least one cavity exposes a portion of the first passivation layer covering the at least one chip contact pad; a second encapsulation structure disposed over the first encapsulation structure and covering the at least one cavity, wherein a chamber region over the at least one chip contact pad is defined by the at least one cavity and the second encapsulation structure; wherein the second encapsulation structure comprises an inlet and outlet connected to the chamber region, wherein the inlet and the outlet control an inflow and outflow of heat dissipating material to and from the chamber region.
地址 Neubiberg DE
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