Executing instruction packet with multiple instructions with same destination by performing logical operation on results of instructions and storing the result to the destination

摘要

An apparatus includes a processor and a memory coupled to the processor. The memory stores an instruction packet (e.g., a VLIW instruction packet) including a first predicate independent instruction and a second predicate independent instruction. Each of the predicate independent instructions has the same destination.

主权项

1. An apparatus comprising:
a processor; and a memory coupled to the processor, wherein the memory stores an instruction packet, the instruction packet including a first predicate independent instruction having a destination and a second predicate independent instruction having the same destination; wherein processing of the instruction packet at the processor includes performing a logical operation on a first result of the first predicate independent instruction with respect to a second result of the second predicate independent instruction, and wherein a value written to the destination corresponds to a result of the logical operation.