发明名称 |
Sigma-delta analog to digital converter with improved feedback |
摘要 |
A sigma-delta analog-to-digital converter includes an input transconductance stage that provides an analog input current proportional to an analog input voltage and a current summing stage that generates an analog error signal corresponding to a difference between the analog input current and a feedback current. The sigma-delta analog-to-digital converter also includes a forward signal path that processes the analog error signal to provide a digital output signal corresponding to the analog input voltage. Additionally, the sigma-delta analog-to-digital converter includes a feedback path that includes a current steering digital-to-analog converter having both sourcing and sinking current sources, wherein currents provided by the sourcing and sinking current sources are steerable and connected to directly provide the feedback current based on the digital output signal. A sigma-delta analog-to-digital converter operating method is also provided. |
申请公布号 |
US8842030(B1) |
申请公布日期 |
2014.09.23 |
申请号 |
US201313891974 |
申请日期 |
2013.05.10 |
申请人 |
Nvidia Corporation |
发明人 |
Fontaine Paul;Bellaouar Abdellatif |
分类号 |
H03M3/00 |
主分类号 |
H03M3/00 |
代理机构 |
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代理人 |
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主权项 |
1. A sigma-delta analog to digital converter, comprising:
an input transconductance stage that provides an analog input current proportional to an analog input voltage; a current summing stage that generates an analog error signal corresponding to a difference between the analog input current and a feedback current; a forward signal path that processes the analog error signal to provide a digital output signal corresponding to the analog input voltage; a feedback path that includes a current steering digital-to-analog converter having both sourcing and sinking current sources, wherein currents provided by the sourcing and sinking current sources are steerable and connected to directly provide the feedback current based on the digital output signal; and a common mode stage in the feedback path that maintains a common mode potential for the current steering digital-to-analog converter, wherein the common mode stage employs four inverting transconductance cells that are connected to maintain the common mode potential. |
地址 |
Santa Clara CA US |