发明名称 Providing a multi-phase lockstep integrity reporting mechanism
摘要 In one embodiment, a processor can enforce a blacklist and validate, according to a multi-phase lockstep integrity protocol, a device coupled to the processor. Such enforcement may prevent the device from accessing one or more resources of a system prior to the validation. The blacklist may include a list of devices that have not been validated according to the multi-phase lockstep integrity protocol. Other embodiments are described and claimed.
申请公布号 US8844021(B2) 申请公布日期 2014.09.23
申请号 US201313925991 申请日期 2013.06.25
申请人 Intel Corporation 发明人 Smith Ned M.;Shanbhogue Vedvyas;Strongin Geoffrey S.;Wiseman Willard M.;Grawrock David W.
分类号 G06F21/44;H04L29/08;G06F21/57;H04L29/06 主分类号 G06F21/44
代理机构 Trop, Pruner & Hu, P.C. 代理人 Trop, Pruner & Hu, P.C.
主权项 1. A processor comprising: a plurality of cores and an uncore logic, wherein the processor is to enforce a blacklist and to validate a device coupled to the processor according to a multi-phase lockstep integrity protocol in which the processor and the device each perform an integrity protocol, the blacklist including a list of devices that have not been validated according to the multi-phase lockstep integrity protocol, the processor to act as a master to perform at least a portion of the multi-phase lockstep integrity protocol, and to extend a first trusted platform module (TPM) platform configuration register (PCR) responsive to an authority value read from a policy entry of a table of the device written by the device after the device has completed at least a portion of a first phase of the multi-phase lockstep integrity protocol.
地址 Santa Clara CA US
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