发明名称 Decision feedback equalizers with high-order continuous time feedback
摘要 Equalization techniques are provided for high-speed data communications and, more specifically, DFE (decision feedback equalizer) circuits and methods are provided which implement a high-order continuous time filter in a DFE feedback path to emulate structured elements of a channel response.
申请公布号 US8842722(B2) 申请公布日期 2014.09.23
申请号 US201213591403 申请日期 2012.08.22
申请人 International Business Machines Corporation 发明人 Dickson Timothy O.;Loh Rui Yan Matthew
分类号 H03H7/30 主分类号 H03H7/30
代理机构 Ryan, Mason & Lewis, LLP 代理人 Dougherty Anne V.;Ryan, Mason & Lewis, LLP
主权项 1. A DFE (decision feedback equalizer) circuit, comprising: a summer circuit to add a first feedback signal, a second feedback signal, and a received signal and generate an input signal; a decision-making slicer circuit to sample the input signal from the summer circuit and generate an output signal; a feedback circuit comprising: a first feedback filter in a first feedback path of the DFE, wherein the first feedback filter comprises a continuous time filter with an order of at least 1, which generates the first feedback signal;a second feedback filter in a second feedback path of the DFE, wherein the second feedback filter comprises a continuous time filter with an order greater than 1, which generates the second feedback signal;a first delay circuit and a second delay circuit;a first analog amplifier and a second analog amplifier; anda second summer circuit;wherein the first delay circuit and first analog amplifier are serially connected between an output of the decision-making slicer circuit and a first input of the second summer circuit,wherein the second delay circuit and second analog amplifier are serially connected between an output of the decision-making slicer circuit and a second input of the second summer circuit, andwherein an output of the second summer circuit is connected to an input of the second feedback filter.
地址 Armonk NY US