发明名称 Initial-on SCR device on-chip ESD protection
摘要 A semiconductor device for electrostatic discharge (ESD) protection includes a silicon controlled rectifier (SCR) including a semiconductor substrate, a first well formed in the substrate, a second well formed in the substrate, a first p-type region formed in the first well to serve as an anode, and a first n-type region partially formed in the second well to serve as a cathode, a p-type metal-oxide-semiconductor (PMOS) transistor formed in the first well including a gate, a first diffused region and a second diffused region separated apart from the first diffused region, a second n-type region formed in the first well electrically connected to the first diffused region of the PMOS transistor, and a second p-type region formed in the substrate electrically connected to the second diffused region of the PMOS transistor.
申请公布号 US8842400(B2) 申请公布日期 2014.09.23
申请号 US201213707380 申请日期 2012.12.06
申请人 Industrial Technology Research Institute 发明人 Ker Ming-Dou;Chen Shih-Hung;Lin Kun-Hsien
分类号 H02H9/00;H01L27/02;H01L23/62 主分类号 H02H9/00
代理机构 Alston & Bird LLP 代理人 Alston & Bird LLP
主权项 1. A method of providing electrostatic discharge (ESD) protection, comprising: providing a silicon controlled rectifier (SCR) including a semiconductor substrate and an n-type well formed in the substrate; providing a p-type metal-oxide-semiconductor (PMOS) transistor formed in the n-type well of the SCR including a gate, a first diffused region and a second diffused region separated apart from the first diffused region; providing an n-type region formed in the n-type well being electrically connected to the first diffused region of the PMOS transistor, wherein the n-type region includes a plurality of sub-regions formed in the n-type well, the plurality of sub-regions being separated apart from each other by the second diffused region of the PMOS transistor; and providing a p-type region formed in the substrate outside of the n-type well, and being electrically connected to the second diffused region of the PMOS transistor, keeping the PMOS transistor at an on state before an ESD event occurs.
地址 Hsinchu TW