DRAM AND METHOD FOR CONTROLLING REFRESH IN DRAM

摘要

A DRAM comprises a memory cell array, refresh row address generation unit which consecutively generates row address of the memory cell array by the interval of normal refresh, and a refresh row address inserting unit. The refresh row address inserting unit stores a baby row address and at least one mom row address corresponding to the baby row address, stops the generation of row addresses when the stored at least one mom row address matches the row address printed out from the refresh row address generation unit, prints out a mom row address corresponding to the baby row address, and resumes generation of the row address after printing out.