发明名称 Circular pipeline processing system
摘要 In one embodiment, a circular pipeline processing system is provided. The system includes a plurality of processing stages configured to operate in a circular pipeline. Each processing stage is configured to output a fully processed data block in response to completing a final processing iteration, and otherwise, store a partially processed data block in a memory buffer of the processing stage. Each processing stage is configured to select between an unprocessed data block and a partially processed data block from the memory buffer of a preceding processing stage, based on one or more of availability of memory sufficient for storage of an unprocessed data block or availability of a partially processed data block. The processing stage is configured to process the selected data block.
申请公布号 US8843807(B1) 申请公布日期 2014.09.23
申请号 US201113212997 申请日期 2011.08.18
申请人 Xilinx, Inc. 发明人 Stirling Colin;Lawrie David I.;Andrews David
分类号 H03M13/00;H03M13/03;H03M13/41 主分类号 H03M13/00
代理机构 代理人
主权项 1. A circular pipeline processing system, comprising: a plurality of processing stages, each processing stage including: at least one processing circuit configured to perform one processing iteration on a first block of data, the processing iteration including: performing a first set of soft-input-soft-output (SISO) decoding operations on the first block of data to produce an intermediate block of data; andperforming a second set of SISO decoding operations on the intermediate data block to complete the one decoding iteration;a memory buffer; and wherein the plurality of processing stages is configured to operate in a circular pipeline of identical processing stages, each processing stage being configured to: output a fully processed data block in response to completing a final processing iteration, and otherwise, store a partially processed data block in the memory buffer of the processing stage;select between an unprocessed data block and a partially processed data block from the memory buffer of a preceding processing stage, based on availability of storage sufficient for an unprocessed data block and availability of a partially processed data block; andprocess the selected data block.
地址 San Jose CA US