发明名称 FINFET WITH BOTTOM SIGE LAYER IN SOURCE/DRAIN
摘要 A FinFET includes a substrate, a fin structure on the substrate, a source in the fin structure, a drain in the fin structure, a channel in the fin structure between the source and the drain, a gate dielectric layer on the channel, and a gate on the gate dielectric layer. At least one of the source and the drain includes a bottom SiGe layer.
申请公布号 KR20140112347(A) 申请公布日期 2014.09.23
申请号 KR20130058486 申请日期 2013.05.23
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 YU MING HUA;JENG PEI REN;LEE TZE LIANG
分类号 H01L29/78;H01L21/336 主分类号 H01L29/78
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