STRETCH DUMMY CELL INSERTION IN FINFET PROCESS

摘要

According to an embodiment of the present invention, a method for identifying an empty area in an IC layout includes the steps of: identifying the empty area which does not include any activation pin and is arranged on the outside of a minimum spacing border; applying a grid map including multiple grids on the inside of the empty area on the upper part of the empty area; and filling the empty area with multiple dummy pin cells by arranging the dummy pin cells in the respective grids. The steps of applying the grid map and filling the empty area are conducted by using a computer.