| 摘要 |
<p>PROBLEM TO BE SOLVED: To provide a semiconductor memory device capable of improving the operation speed.SOLUTION: A semiconductor memory device 1 includes a sense amplifier. The sense amplifier includes: a second transistor 44 for charging a first node TMP; a third transistor 43 connecting a bit line to the first node TMP; a fourth transistor 51 connecting the first node TMP to a second node N1_U; and a fifth transistor 54 connecting the first node TMP to a third node SEN. When data are read, a gate signal HLL for the second transistor 44 is negated, a gate signal SW1_U for the fourth transistor 51 is then negated, while the gate signal HLL for the second transistor 44 is asserted, the gate signal HLL for the second transistor 44 is then negated, a gate signal SW2 for the fifth transistor 54 is then asserted, and the gate signal SW1_U for the fourth transistor 51 is then asserted.</p> |
