发明名称 Assembling and Handling Edge Interconnect Packaging System
摘要 Apparatuses and methods related to the field of microchip assembly and handling, in particular to devices and methods for assembling and handling microchips manufactured with solid edge-to-edge interconnects, such as Quilt Packaging® interconnect technology. Specialized assembly tools are configured to pick up one or more microchips, place the microchips in a specified location aligned to a substrate, package, or another microchip, and facilitate electrical contact through one of a variety of approaches, including solder reflow. This specialized assembly tooling performs heating functions to reflow solder to establish electrical and mechanical interconnections between multiple microchips. Additionally, the interconnected microchips may be arranged in an arbitrarily large array.
申请公布号 US2014268592(A1) 申请公布日期 2014.09.18
申请号 US201414211127 申请日期 2014.03.14
申请人 Indiana Integrated Circuits, LLC 发明人 Kulick Jason M.;Lu Tian
分类号 H05K3/30;H05K1/18 主分类号 H05K3/30
代理机构 代理人
主权项 1. A method for interconnecting microchips comprising: (a) positioning a first microchip using a first manipulator, wherein the first microchip has a set of first nodules located on an edge of the first microchip; (b) securing the first microchip in place; (c) positioning a second microchip using a second manipulator, wherein the second microchip has a set of second nodules located on an edge of the second microchip; (d) moving the second microchip so that the set of second nodules is positioned proximate to the set of first nodules; (e) securing the second microchip in place; and (f) joining the set of first nodules to the set of second nodules to interconnect the first and second microchips.
地址 South Bend IN US