| 发明名称 |
Metal Capping Layer for Interconnect Applications |
| 摘要 |
An integrated circuit structure includes a semiconductor substrate and a dielectric layer over the semiconductor substrate. The integrated circuit structure further includes a conductive wiring in the dielectric layer. The integrated circuit structure also includes a first metallic capping layer over the conductive wiring and a second metallic capping layer over the first metallic capping layer. The second metallic capping layer has a width substantially the same as a width of the first metallic capping layer. |
| 申请公布号 |
US2014264872(A1) |
申请公布日期 |
2014.09.18 |
| 申请号 |
US201313915376 |
申请日期 |
2013.06.11 |
| 申请人 |
Taiwan Semiconductor Manufacturing Company, Ltd. |
发明人 |
Lin Yu-Hung;Wei Bor-Jou;Chen Chun-Chang;Liang Yao Hsiang;Chang Yu-Min;Lin Shih-Chi |
| 分类号 |
H01L23/532;H01L21/768 |
主分类号 |
H01L23/532 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An integrated circuit structure comprising:
a substrate; a dielectric layer over the substrate; a conductive wiring in the dielectric layer; a first metallic capping layer over the conductive wiring; and a second metallic capping layer over the first metallic capping layer, wherein the second metallic capping layer has a width substantially the same as a width of the first metallic capping layer. |
| 地址 |
Hsin-Chu TW |
