发明名称 SEMICONDUCTOR STORAGE DEVICE
摘要 According to one embodiment, provided is a semiconductor storage device that includes a control circuit to control the voltage that is applied to the memory cell. The control circuit is configured to execute a reset operation that applies a reset voltage of a first polarity to a selected memory cell that is connected to a selected first wire and a selected second wire during a reset operation. The control circuit is configured to execute a cancel operation that applies a cancel voltage of a second polarity that is opposite to the first polarity to an unselected memory cell and at the same time can execute a verify operation that reads out the state of the selected memory cell by applying a readout voltage of the second polarity to the selected memory cell. The cancel voltage and the readout voltage are the same voltage value.
申请公布号 US2014268999(A1) 申请公布日期 2014.09.18
申请号 US201314017250 申请日期 2013.09.03
申请人 Kabushiki Kaisha Toshiba 发明人 ICHIHARA Reika;SUGIMAE Kikuko;MIYAZAKI Takayuki;IWATA Yoshihisa
分类号 G11C13/00 主分类号 G11C13/00
代理机构 代理人
主权项 1. A semiconductor storage device, comprising: a plurality of memory cells that each comprise a variable resistance element; a plurality of first wires and a plurality of second wires, wherein each memory cell is disposed between and electrically coupled to one of the plurality of first wires and one of the plurality of second wires, and each first wire is electrically coupled to two or more memory cells and each second wire is electrically coupled to two or more memory cells; a control circuit that controls the voltage applied to the memory cells, wherein the control circuit is configured to apply a reset voltage of a first polarity to a first memory cell, which is connected to a selected first wire of the plurality of first wires and a selected second wire of the plurality of second wires, the control circuit is further configured to apply a cancel voltage of a second polarity opposite to the first polarity to a second memory cell, wherein the second memory cell is applied a certain voltage when the reset voltage is applied to the first memory cell and the absolute value of the certain voltage is less than the absolute value of the reset voltage, andat the same time, applying a readout voltage of the second polarity to the first memory cell, andthe cancel voltage and the readout voltage have the same voltage value.
地址 Tokyo JP