CIRCUIT AND SYSTEM FOR CONCURRENTLY PROGRAMMING MULTIPLE BITS OF OTP MEMORY DEVICES

摘要

Circuits and systems for concurrently programming a plurality of OTP cells in an OTP memory are disclosed. Each OTP cell can have an electrical fuse element coupled a program selector having a control terminal. The control terminals of a plurality of OTP cells can be coupled to a plurality of local wordlines, and a plurality of the local wordlines can be coupled to at least one global wordline. A plurality of banks of bitlines can have each bitline coupled to a plurality of the OTP cells via the control terminal of the program selector. A plurality of bank selects can enable turning on the wordlines or bitlines in a bank. A plurality of the OTP cells can be configured to be programmable concurrently into a different logic state by applying voltages to at least one selected global wordline and at least one selected bitline to a plurality of the selected OTP cells in a plurality of banks, if a plurality of banks are enabled.

主权项

1. An One-Time Programmable (OTP) memory capable of multiple-bit programming, comprising:
a plurality of OTP cells, at least one of the OTP cells including an electrical fuse element coupled to a program selector, the program selector having a control terminal; a plurality of local wordlines, each coupled to a plurality of the OTP cells via the control terminal of the program selector and having a first resistivity; a plurality of global wordlines, each coupled to at least one of the local wordlines and having a second resistivity; and a plurality of banks of bitlines, each bitline coupled to a plurality of the OTP cells; a plurality of bank selects to enable turning on the wordlines or bitlines in a bank; and wherein a plurality of OTP cells can be configured to be concurrently programmable by applying at least one voltage to at least one wordline and at least one bitline in a plurality of banks if a plurality of the bank selects are asserted.