发明名称 |
METHOD AND APPARATUS FOR CONTROLLED RESET SEQUENCES WITHOUT PARALLEL FUSES AND PLL'S |
摘要 |
A system, semiconductor device and method for providing a controlled system reset sequence with lower power consumption without dependency on fuses, PLL's and external XTAL's. A method to simplify a boot sequence by using a ring oscillator that compensates for voltage and temperature variations while also removing the dependency on parallel fuses, PLL's and external XTAL's. |
申请公布号 |
US2014281641(A1) |
申请公布日期 |
2014.09.18 |
申请号 |
US201313844824 |
申请日期 |
2013.03.16 |
申请人 |
Intel Corporation |
发明人 |
Herrera Mejia Ivan;Sarurkar Vishram;Vuppaladadium Vijay K. |
分类号 |
G06F1/24 |
主分类号 |
G06F1/24 |
代理机构 |
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代理人 |
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主权项 |
1. A method for a power on sequence, comprising:
initiating a ring oscillator responsive to receiving a power up signal from a power management IC; generating a calibrated ring oscillator signal by calibrating a frequency of a ring oscillator signal with a reference clock signal; responsive to detecting a calibrated ring oscillator signal error below a predetermined threshold value:
providing the calibrated ring oscillator signal to a firmware module to execute firmware. |
地址 |
Santa Clara CA US |