发明名称 |
Systems, Apparatuses, and Methods for Reducing the Number of Short Integer Multiplications |
摘要 |
Systems, methods, and apparatuses for calculating a square of a data value of a first source operand, a square of a data value of a second source operand, and a multiplication of the data of the first and second operands only using one multiplication are described. |
申请公布号 |
US2014281395(A1) |
申请公布日期 |
2014.09.18 |
申请号 |
US201313840985 |
申请日期 |
2013.03.15 |
申请人 |
Albrekht Ilya;Ould-Ahmed-Vall Elmoustapha |
发明人 |
Albrekht Ilya;Ould-Ahmed-Vall Elmoustapha |
分类号 |
G06F9/30 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
1. An apparatus comprising:
decode logic to decode square-multiply (SQRMUL) instruction, the SQRMUL instruction including a first source operand, a second source operand, and a destination operand; execution logic to
calculate a square of a data value of a first source operand,calculate a square of a data value of a second source operand,calculate a multiplication of the data of the first and second operands, wherein the calculations only use one multiplication operation; and
store the results in the destination operand. |
地址 |
Phoenix AZ US |