发明名称 |
METHODS AND CIRCUIT STRUCTURES FOR MITIGATING VOLTAGE STRESSES ON PRINTED CIRCUIT BOARD (PCB) IN HIGH VOLTAGE DEVICES |
摘要 |
A method for mitigating voltage stress on a PCB includes applying AC voltage to a multi-terminal condenser structure of a multi-layered PCB. The terminal condenser structure is formed by overlapping a plurality of conductive traces between board layers of the multi-layered PCB. A corresponding dielectric layer is disposed between the overlapping conductive traces of the board layers. The overlapping conductive traces include a first terminal, a second terminal, a third terminal, and a fourth terminal. The first terminal and the third terminal are disposed on a first layer of the multi-layered PCB, and the second terminal and the fourth terminal are disposed on a bottom layer of the multi-layered PCB. The first terminal and the second terminal are connected to a ground point, and the third terminal and the fourth terminal are connected to the AC voltage. Voltage stresses on the PCB are mitigated utilizing the multi-terminal condenser structure. |
申请公布号 |
US2014262445(A1) |
申请公布日期 |
2014.09.18 |
申请号 |
US201414206366 |
申请日期 |
2014.03.12 |
申请人 |
Woodward, JR. Robert Clark |
发明人 |
Woodward, JR. Robert Clark |
分类号 |
H05K1/02 |
主分类号 |
H05K1/02 |
代理机构 |
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代理人 |
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主权项 |
1. A method for mitigating voltage stresses on a printed circuit board (PCB), comprising:
applying an alternating current (AC) voltage to a multi-terminal condenser structure of a multi-layered PCB, wherein the terminal condenser structure is formed by overlapping a plurality of conductive traces disposed between board layers of the multi-layered PCB, wherein a corresponding dielectric layer is disposed between the plurality of overlapping conductive traces of the board layers, wherein the plurality of overlapping conductive traces comprise:
at least a first terminal a second terminal, a third terminal and a fourth terminal, wherein the first terminal and the third terminal are disposed on a first layer of the multi-layered PCB, and the second terminal and the fourth terminal are disposed on a bottom layer of the multi-layered PCB;wherein the first terminal and the second terminal are connected to a ground point, and the third terminal and the fourth terminal are connected to the AC voltage; and mitigating voltage stresses on the PCB utilizing the multi-terminal condenser structure to by-pass AC currents from the applied AC voltage to the ground point. |
地址 |
Cambridge MA US |