REESTABLISHING SYNCHRONIZATION IN A MEMORY SYSTEM

摘要

Embodiments relate to reestablishing synchronization across multiple channels in a memory system. One aspect is a system that includes a plurality of channels, each providing communication with a memory buffer chip and a plurality of memory devices. A memory control unit is coupled to the plurality of channels. The memory control unit is configured to perform a method that includes receiving an out-of-synchronization indication associated with at least one of the channels. The memory control unit performs a first stage of reestablishing synchronization that includes selectively stopping new traffic on the plurality of channels, waiting for a first time period to expire, resuming traffic on the plurality of channels based on the first time period expiring, and verifying that synchronization is reestablished for a second time period.

主权项

1. A system for reestablishing synchronization across multiple channels in a memory system, the system comprising:
a plurality of channels each providing communication with a memory buffer chip and a plurality of memory devices; and a memory control unit coupled to the plurality of channels, the memory control unit configured to perform a method comprising:
receiving an out-of-synchronization indication associated with at least one of the channels; andperforming, by the memory control unit, a first stage of reestablishing synchronization comprising:
selectively stopping new traffic on the plurality of channels;waiting for a first time period to expire;resuming traffic on the plurality of channels based on the first time period expiring; andverifying that synchronization is reestablished for a second time period.