STRESS ENHANCED FINFET DEVICES

摘要

A non-planar semiconductor with enhanced strain includes a substrate and at least one semiconducting fin formed on a surface of the substrate. A gate stack is formed on a portion of the at least one semiconducting fin. A stress liner is formed over at least each of a plurality of sidewalls of the at least one semiconducting fin and the gate stack. The stress liner imparts stress to at least a source region, a drain region, and a channel region of the at least one semiconducting fin. The channel region is located in at least one semiconducting fin beneath the gate stack.

主权项

1. A method for fabricating a non-planar semiconductor structure, the method comprising:
forming at least one semiconducting fin on a surface of a semiconductor substrate, wherein a gate stack is located on a portion of the at least one semiconducting fin; epitaxially growing a semiconductor material on at least each of a plurality of sidewalls of the at least one semiconducting fin; forming, after the semiconductor material is epitaxially grown, a source region and a drain region in the at least one semiconducting fin; removing, after forming the source and drain regions, the epitaxial grown semiconductor material; and forming, after the epitaxial grown semiconductor material has been removed, a stress liner over at least each of the plurality of sidewalls of the at least one semiconducting fin and the gate stack, wherein the stress liner imparts stress to the source region, the drain region, and a channel of the at least one semiconducting fin, wherein the channel is located beneath the gate stack.