发明名称 |
METHODS FOR FABRICATING INTEGRATED CIRCUITS THAT INCLUDE A SEALED SIDEWALL IN A POROUS LOW-K DIELECTRIC LAYER |
摘要 |
Methods for fabricating integrated circuits are provided. In one example, a method for fabricating an integrated circuit includes forming a sidewall in a porous low-k dielectric layer that overlies a semiconductor substrate using a plurality of discontinuous etching treatments. Exposed portions of the sidewall are progressively sealed interposingly between the discontinuous etching treatments to form a sealed sidewall. The sealed sidewall defines a trench in the porous low-k dielectric layer. |
申请公布号 |
US2014273463(A1) |
申请公布日期 |
2014.09.18 |
申请号 |
US201313841855 |
申请日期 |
2013.03.15 |
申请人 |
GLOBALFOUNDRIES, INC. |
发明人 |
Shamiryan Denis;Urbanowicz Adam Michal |
分类号 |
H01L21/311 |
主分类号 |
H01L21/311 |
代理机构 |
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代理人 |
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主权项 |
1. A method for fabricating an integrated circuit comprising:
forming a sidewall in a porous low-k dielectric layer that overlies a semiconductor substrate using a plurality of discontinuous etching treatments; and progressively sealing exposed portions of the sidewall interposingly between the discontinuous etching treatments to form a sealed sidewall that defines a trench in the porous low-k dielectric layer. |
地址 |
Grand Cayman KY |