发明名称 Multi-Level Sigma-Delta ADC With Reduced Quantization Levels
摘要 A multi-level sigma-delta Analog to Digital converter provides multi-level outputs using a quantizer with reduced quantization levels. The converter comprises a direct path comprising a computation block, an analog integrator, a digital integrator and the quantizer with reduced quantization levels. Further, the converter comprises a feedback path arranged to provide to the computation block a feedback analog signal. The feedback analog signal is injected via the feedback path and the computation block directly at the input terminal of the quantizer. The converter allows reduction of the complexity of the quantizer.
申请公布号 US2014266829(A1) 申请公布日期 2014.09.18
申请号 US201214351111 申请日期 2012.10.10
申请人 ST-Ericsson SA 发明人 Pinna Carlo
分类号 H03M3/00 主分类号 H03M3/00
代理机构 代理人
主权项
地址 Plan-les-Ouates CH