发明名称 |
Semiconductor Device and Method of Calibrating Warpage Testing System to Accurately Measure Semiconductor Package Warpage |
摘要 |
A warpage test system uses a calibration block to calibrate the warpage test system over a temperature profile. The calibration block includes a first metal block bonded to a second metal block. The first metal block includes a first metal and a second different metal. The first metal block includes a CTE different than a CTE of the second metal block. The calibration block is disposed in the warpage test system. A warpage of the calibration block is measured over a temperature profile ranging from 28° C. to 260° C. A deviation between the measured warpage of the calibration block and a known thermal expansion of the calibration block over the temperature profile is recorded. The warpage measurement in a semiconductor package is compensated by the deviation between the measured warpage of the calibration block and the known thermal expansion or warpage of the calibration block over the temperature profile. |
申请公布号 |
US2014269810(A1) |
申请公布日期 |
2014.09.18 |
申请号 |
US201313846593 |
申请日期 |
2013.03.18 |
申请人 |
STATS CHIPPAC, LTD. |
发明人 |
Ko WonJun;Chai SeungYong;Kim OhHan;Kim GwangTae;Lee Kenny |
分类号 |
G01N25/72 |
主分类号 |
G01N25/72 |
代理机构 |
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代理人 |
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主权项 |
1. A method of calibrating a warpage test system, comprising:
providing a calibration block including a first metal block bonded to a second metal block, wherein the first metal block includes a coefficient of thermal expansion (CTE) different than a CTE of the second metal block; disposing the calibration block in the warpage test system; measuring warpage of the calibration block over a temperature profile; and recording a deviation between the measured warpage of the calibration block and a known thermal expansion of the calibration block over the temperature profile. |
地址 |
Singapore SG |