| 发明名称 |
Combined Power and Input/Output Line |
| 摘要 |
An electronic device including a host system including a source; and a target system operably coupled to the host system via a combined power I/O line; wherein the target system includes a pass transistor and a switching system cooperative to allow the source to charge a power supply capacitor on the target system via the combined power I/O line in a first mode and alternately charge and discharge the power supply capacitor during a communication via the combined power I/O line in a second mode, wherein the alternately charging and discharging is in synchronization with said communication. |
| 申请公布号 |
US2014281049(A1) |
申请公布日期 |
2014.09.18 |
| 申请号 |
US201313841439 |
申请日期 |
2013.03.15 |
| 申请人 |
MICROCHIP TECHNOLOGY INCORPORATED |
发明人 |
Julicher Joseph;Schieke Pieter;Delport Vivien |
| 分类号 |
G06F13/10 |
主分类号 |
G06F13/10 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A combined power and input/output system, comprising:
a host system; a target system operably coupled to the host system via a combined power and I/O line; wherein the host system is configured to charge a power supply capacitor in the target system in a first mode via the combined power and I/O line and communicate via the combined power and I/O line in a second mode. |
| 地址 |
Chandler AZ US |
