DESIGN RULE CHECKS IN 3-D VIRTUAL FABRICATION ENVIRONMENT

摘要

A virtual fabrication environment that enables 3D Design Rule Checks (DRCs) or Optical Rule Checks (ORCs) on 3D structural models of semiconductor devices to be performed is discussed. The virtual fabrication environment may perform 3D design rule checks, such as minimum line width, minimum space between features, and minimum contact area between adjacent materials, directly in 3D without making assumptions about the translation from 2D design data to a 3D structure effected by an integrated process flow for semiconductor devices. The required number of 3D design rule checks may therefore be significantly reduced from the number of design rule checks required in 2D environments. Embodiments may also perform the 3D design rule checks for a range of statistical variations in process and design parameters.

主权项

1. A non-transitory computer-readable medium holding computer-executable instructions for performing and developing design rule checks with a 3D structural model for a semiconductor device structure, the instructions when executed causing the computing device to:
receive a selection of a process sequence and 2D design data for a semiconductor device structure to be virtually fabricated; perform with the computing device a virtual fabrication run for the structure using the process sequence and 2D design data, the virtual fabrication run building a 3D structural model; and perform a set of 3D design rule checks by searching the 3D structural model for locations where specified minimum or maximum dimensional criteria are satisfied.