| 发明名称 |
Stacked Integrated Circuit System |
| 摘要 |
A stacked integrated circuit system comprises a first chip with first average pattern density comprising memory cells, a second chip with second average pattern density comprising logic circuitries for the memory cells and a functioning unit and a plurality of through-silicon vias within one of the first chip and second chip to electrically connect the first chip and the second chip, wherein the memory cells of the first chip and the logic circuitries of the second chip are designed to be used collectively in order to perform complete memory functions, and wherein the first average pattern density is higher than the second average pattern density. |
| 申请公布号 |
US2014264915(A1) |
申请公布日期 |
2014.09.18 |
| 申请号 |
US201313833627 |
申请日期 |
2013.03.15 |
| 申请人 |
Huang Chao-Yuan;Ho Yueh-Feng;Yang Ming-Sheng;Chen Hwi-Huang |
发明人 |
Huang Chao-Yuan;Ho Yueh-Feng;Yang Ming-Sheng;Chen Hwi-Huang |
| 分类号 |
H01L25/18 |
主分类号 |
H01L25/18 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A stacked integrated circuit system, comprising:
a first chip with first average pattern density, comprising memory cells; a second chip with second average pattern density, comprising logic circuitries for the memory cells and a functioning unit; and a plurality of through-silicon vias within one of the first chip and second chip to electrically connect the first chip and the second chip, wherein the memory cells of the first chip and the logic circuitries of the second chip are designed to be used collectively in order to perform complete memory functions, and wherein the first average pattern density is higher than the second average pattern density. |
| 地址 |
Hsinchu City TW |
