SCALABLE AND RELIABLE NON-VOLATILE MEMORY CELL

摘要

Devices and methods for forming a device are disclosed. The method includes providing a substrate and forming a memory cell pair on the substrate. Each of a memory cell of the memory cell pair includes at least one transistor having first and second gates formed between first and second terminals and a third gate disposed over the second terminal. The first gate serves as an access gate (AG), the second gate serves as a storage gate and the third gate serves as an erase gate (EG). The first cell terminal serves as a bitline terminal and the second cell terminal serves as a source line terminal. The source line terminal is a raised source line terminal and is elevated with respect to the bit line terminal and the source line terminal is common to the memory cell pair.

主权项

1. A method for forming a device comprising:
providing a substrate; and forming a memory cell pair on the substrate, wherein each of a memory cell of the memory cell pair comprises at least one transistor having first and second gates formed between first and second terminals and a third gate disposed over the second terminal, wherein
the first gate serves as an access gate (AG), the second gate serves as a storage gate and the third gate serves as an erase gate (EG),the first cell terminal serves as a bitline terminal and the second cell terminal serves as a source line terminal, wherein the source line terminal is a raised source line terminal and is elevated with respect to the bit line terminal and the source line terminal is common to the memory cell pair.