| 摘要 |
<p>Disclosed is a transistor with a modified gate structure. The transistor comprises a substrate and a medium layer arranged on the substrate. The medium layer is provided with a source area, a drain area, and a channel area communicating the source area with the drain area. A first top gate arranged in the channel area is used as an output electrode of the transistor, and an output logical value of the output electrode is logic 1 when the channel area is on and is logic 0 when the channel area is off. The transistor is also provided with at least two input electrodes to control the channel area, at least one of the input electrodes is a second top gate, and at least one of the input electrodes is a third top gate and/or bottom gate. Both the second top gate and the third top gate are arranged on the medium layer and beside the channel area. According to the transistor of the present invention, the number of transistors in a logical circuit can be decreased, the manufacturing method of the logical circuit is simple, the area of devices is reduced, the yield of logical circuits is increased, the manufacturing cost is lowered, and further, the electrical performance of logical circuit devices can be improved and adjusted conveniently.</p> |
