Processor Scheduling With Thread Performance Estimation On Core Of Different Type

摘要

A processor is described having an out-of-order core to execute a first thread and a non-out-of-order core to execute a second thread. The processor also includes statistics collection circuitry to support calculation of the following: the first thread's performance on the out-of-order core; an estimate of the first thread's performance on the non-out-of-order core; the second thread's performance on the non-out-of-order core; an estimate of the second thread's performance on the out-of-order core.

主权项

1. A processor, comprising
an out-of-order core to execute a first thread; a non-out-of-order core to execute a second thread; statistics collection circuitry to support calculation of the following: said first thread's performance on said out-of-order core; an estimate of said first thread's performance on said non-out-of-order core; said second thread's performance on said non-out-of-order core; an estimate of said second thread's performance on said out-of-order core.