发明名称 SOLID-STATE IMAGING DEVICE, AND IMAGING DEVICE
摘要 A solid-state imaging device according to the present invention includes: a pixel block in which pixels are arranged in a matrix; vertical common signal lines each provided for a corresponding one of columns of the plurality of pixels, and reads signals of pixels in the corresponding column; and a column constant current source which supplies a current to the vertical common signal lines, wherein the column constant current source includes: load transistors each having a source terminal and a drain terminal one of which is connected to one of the vertical common signal lines and the other of which is grounded; a constant voltage supply unit which supplies a voltage to gate terminals of the load transistors; and a voltage holding circuit in which sample and hold circuits are connected in multiple stages, and which stabilizes the voltage which is supplied to the gate terminals of the load transistors.
申请公布号 US2014263966(A1) 申请公布日期 2014.09.18
申请号 US201414290159 申请日期 2014.05.29
申请人 Panasonic Corporation 发明人 HIKOSAKA Koji;IKUMA Makoto
分类号 H04N5/357 主分类号 H04N5/357
代理机构 代理人
主权项 1. A solid-state imaging device comprising: a pixel unit in which a plurality of pixels are arranged in a matrix; a plurality of vertical common signal lines each of which is provided for a corresponding one of columns of the plurality of pixels, and reads signals of pixels in the corresponding column; and a column constant current source which supplies a current to the plurality of vertical common signal lines, wherein the column constant current source includes: a plurality of load transistors each having a source terminal and a drain terminal one of which is connected to one of the plurality of vertical common signal lines and the other of which is grounded; a constant voltage supply unit which supplies a voltage to gate terminals of the plurality of load transistors; and a first multi-stage sample and hold circuit in which sample and hold circuits for sampling and holding the voltage are connected in multiple stages, the first multi-stage sample and hold circuit stabilizing the voltage which is supplied to the gate terminals of the plurality of load transistors.
地址 Osaka JP