SYSTEM AND METHOD FOR EVENT COUNTER BASED DIGITAL CIRCUIT DESIGN WITH CORRESPONDING DIGITAL CIRCUIT

摘要

A system for designing a digital circuit including: a digital circuit simulator based on a file containing a functional description of the digital circuit; a mechanism estimating an output variable from the digital circuit when executing a test bench supplied to the simulator; event counters, events being detected using control signals provided by the simulator when executing the test bench; and a mechanism building at least one calculation model of the digital circuit output variable based on a sequence of estimation data of the output variable and output data of the event counters. The building mechanism can assign a plurality of possible modes to the output variable and build a different output variable calculation model for each possible mode.