Retention check logic for non-volatile memory

摘要

An integrated circuit memory device includes an array of non-volatile, charge trapping memory cells, configured to store data values in memory cells in the array using threshold states, including a higher threshold state characterized by a minimum threshold exceeding a selected read bias. A controller includes a stand-by mode, a write mode and a read mode. Retention check logic executes on power-up, or during the stand-by mode, to identify memory cells in the higher threshold state which fail a threshold retention check. Also, logic is provided to reprogram the identified memory cells.