发明名称 |
Memory device |
摘要 |
A memory device includes first and second inverters cross-coupled between first and second nodes. The first inverter is configured to be supplied by a first supply voltage via a first transistor and the second inverter is configured to be supplied by the first supply voltage via a second transistor. A first control circuit is configured to control a gate node of the first transistor based on the voltage at the second node and at a gate node of the second transistor. A second control circuit is configured to control the gate node of the second transistor based on the voltage at the first node and at the gate node of the first transistor. |
申请公布号 |
US8837206(B2) |
申请公布日期 |
2014.09.16 |
申请号 |
US201213669226 |
申请日期 |
2012.11.05 |
申请人 |
STMicroelectronics (Crolles 2) |
发明人 |
Glorieux Maximilien;Clerc Sylvain;Gasiot Gilles;Roche Phillippe |
分类号 |
G11C11/00 |
主分类号 |
G11C11/00 |
代理机构 |
Slater & Matsil, L.L.P. |
代理人 |
Slater & Matsil, L.L.P. |
主权项 |
1. A memory device comprising:
first and second inverters cross-coupled between first and second nodes, the first inverter coupled to a first supply voltage node via a first transistor and the second inverter coupled to the first supply voltage node via a second transistor; a first control circuit configured to control a gate node of the first transistor based on the voltage at the second node and at a gate node of the second transistor; and a second control circuit configured to control the gate node of the second transistor based on the voltage at the first node and at the gate node of the first transistor. |
地址 |
Crolles FR |