发明名称 Method for fabricating semiconductor devices using stress engineering
摘要 A method for fabricating a semiconductor device is presented. The method comprises providing a gate stack including a gate dielectric and gate electrode over a substrate. Stressor regions comprising stressor material incorporated into substitutional sites of the substrate are formed within the substrate on opposed sides of the gate stack. A first stressor layer having a first stress value is formed over the semiconductor device after forming the stressor regions followed by an anneal to memorize at least a portion of the first stress value in the semiconductor device, wherein the anneal is conducted at a low temperature.
申请公布号 US8836036(B2) 申请公布日期 2014.09.16
申请号 US201012776437 申请日期 2010.05.10
申请人 GLOBALFOUNDRIES Singapore Pte. Ltd. 发明人 Tan Shyue Seng;Teo Lee Wee
分类号 H01L21/70;H01L21/336;H01L29/78;H01L21/265;H01L29/66 主分类号 H01L21/70
代理机构 Horizon IP Pte Ltd 代理人 Horizon IP Pte Ltd
主权项 1. A method for fabricating a semiconductor device comprising: providing a substrate prepared with isolation regions; forming a gate stack having first and second sidewalls over a substrate; forming stressor diffusion extension regions within the substrate on opposed sides of the gate stack, wherein the stressor diffusion extension regions comprise a first concentration of stressor atoms incorporated into substitutional sites of diffusion extension regions; forming source/drain (S/D) stressor diffusion regions on opposed sides of the gate stack within the substrate, wherein the S/D stressor diffusion regions comprise a depth which is deeper than the diffusion extension regions and comprise the first concentration of stressor atoms incorporated into substitutional sites of S/D diffusion regions; forming a first stressor layer over the substrate after forming the stressor diffusion extension regions, the first stressor layer having a first stress value; performing a first anneal to memorize at least a portion of the first stress value in the semiconductor device, wherein the first anneal is conducted at a low temperature; and performing a second anneal with a laser based anneal to activate dopants in the S/D diffusion regions after the first anneal, wherein the first and second anneal prevent displacement of the stressor atoms having the first concentration from the substitutional sites and which are distributed throughout a width of diffusion extension and diffusion regions which extends from a sidewall of the gate to the isolation region.
地址 Singapore SG