| 发明名称 | Method for improving thermal stability of metal gate | ||
| 摘要 | The present disclosure provides a method of fabricating a semiconductor device that includes providing a semiconductor substrate, forming a gate structure on the substrate, the gate structure including a dummy gate, removing the dummy gate from the gate structure thereby forming a trench, forming a work function metal layer partially filling the trench, forming a fill metal layer filling a remainder of the trench, performing a chemical mechanical polishing (CMP) to remove portions of the metal layers outside the trench, and implanting Si, C, or Ge into a remaining portion of the fill metal layer. | ||
| 申请公布号 | US8835294(B2) | 申请公布日期 | 2014.09.16 |
| 申请号 | US201012724984 | 申请日期 | 2010.03.16 |
| 申请人 | Taiwan Semiconductor Manufacturing Company, Ltd. | 发明人 | Chew Han-Guan;Zhu Ming;Teo Lee-Wee;Chuang Harry Hak-Lay;Chen Yi-Ren |
| 分类号 | H01L21/3205;H01L21/28;H01L21/02;H01L29/66;H01L21/3215;H01L29/49;H01L21/768;H01L21/8238 | 主分类号 | H01L21/3205 |
| 代理机构 | Haynes and Boone, LLP | 代理人 | Haynes and Boone, LLP |
| 主权项 | 1. A method of fabricating a semiconductor device comprising: providing a semiconductor substrate; forming a gate structure on the substrate, the gate structure including a dummy gate, an interfacial layer, and a dielectric layer; removing the dummy gate from the gate structure thereby forming a trench, such that the dielectric layer remains within the trench; forming a work function metal layer partially filling the trench, the work function metal layer formed over the dielectric layer; forming a fill metal layer filling a remainder of the trench; performing a chemical mechanical polishing (CMP) to remove portions of the metal layers outside the trench; and implanting one of Si, C, and Ge into a remaining portion of the fill metal layer. | ||
| 地址 | Hsin-Chu TW | ||