Robust initialization with phase change memory cells in both configuration and array

摘要

The present application discloses phase-change memory architectures and methods, in which an additional test is performed, after the normal power-valid signal, to assure that the phase-change memory components which are used for storing configuration data are able to operate correctly. Surprisingly, the inventor has discovered that this additional test is highly desirable when using phase-change memory for configuration data.

主权项

1. A memory comprising:
at least one array of phase change memory cells; redundancy logic which redirects attempted accesses from defective memory elements in said array to redundant memory elements, in dependence on a table of defective memory locations residing in phase change memory when power to the memory is OFF; and a voltage qualification unit configured to test whether reads of a plurality of phase change memory reference cells produce different outputs corresponding to the different logic states stored in said reference cells, and to allow said redundancy logic to begin redirecting accesses only after said outputs correspond to said logic states, wherein said test uses a read voltage generated using said power to the memory.