发明名称 |
Content addressable memory |
摘要 |
NAND architecture non-volatile content addressable (CAM) memory devices and methods are described that allows for high density, low cost CAM devices. In addition, the NAND architecture non-volatile CAM memory operates with reduced power consumption characteristics for low power and portable applications. In one NAND architecture non-volatile CAM memory embodiment a wired NOR match line array is utilized. In another embodiment a NAND match line array is shown. In yet other embodiments, hierarchal addressing, hash addressing, tree search and algorithmic/hardware engine based search is detailed utilizing both conventional NAND architecture non-volatile Flash memory arrays and dedicated NAND architecture CAM arrays utilizing wired NOR and wired NAND match lines. |
申请公布号 |
US8837189(B2) |
申请公布日期 |
2014.09.16 |
申请号 |
US201213459544 |
申请日期 |
2012.04.30 |
申请人 |
Micron Technology, Inc. |
发明人 |
Roohparvar Frankie F. |
分类号 |
G11C15/00;G11C16/04;G11C15/04 |
主分类号 |
G11C15/00 |
代理机构 |
Dicke, Billig & Czaja, PLLC |
代理人 |
Dicke, Billig & Czaja, PLLC |
主权项 |
1. A content addressable memory (CAM) device, comprising:
a non-volatile memory array having a plurality of non-volatile memory cells arranged in a plurality of NAND architecture memory cell strings; a search word register having an inverting and non-inverting output for each bit position of the search word register, wherein each output of the search word register is coupled to a plurality of word lines of the plurality of NAND memory cell strings; a source line coupled to one or more source-side connections of the plurality of NAND memory cell strings; and a plurality of match lines, each match line coupled to a drain-side connection of a NAND string of the plurality of NAND strings; wherein each NAND memory cell string of the plurality of NAND memory cell strings stores a data word in a plurality of CAM memory cell structures and where each CAM memory cell structure is formed from a paired first and second non-volatile memory cells of the NAND memory cell string; wherein a control gate of the first non-volatile memory cell of each CAM memory cell structure is coupled to a non-inverting output of a selected bit position of the search word register and a control gate of the second non-volatile memory cell is coupled to an inverting output of a selected bit position of the search word register; and wherein the CAM memory device is adapted to couple a voltage of the source line through a NAND memory cell string to its coupled match line when a data word stored in the NAND memory cell string matches an input data word stored in the search word register. |
地址 |
Boise ID US |