Distributing power with through-silicon-vias

摘要

An integrated circuit with distributed power using through-silicon-vias (TSVs) is presented. The integrated circuit has conducting pads for providing power and ground located within the peripheral region of the top surface. A number of through-silicon-vias are distributed within the peripheral region and a set of TSVs are formed within the non-peripheral region of the integrated circuit. Conducting lines on the bottom surface are coupled between each peripheral through-silicon-via and a corresponding non-peripheral through-silicon-via. Power is distributed from the conducting pads to the TSVs within the non-peripheral region through the TSVs within the peripheral region, thus supplying power and ground to circuits located within the non-peripheral region of the integrated circuit chip.

主权项

1. A method for forming an integrated circuit, comprising:
providing a semiconductor substrate having a frontside that is primarily active and a backside that is opposite the frontside; defining a layout of logic elements to be fabricated on the semiconductor substrate, wherein the logic elements are not overlapped, and at least one interconnect layer connects the logic elements together on the semiconductor substrate, the frontside of the semiconductor substrate including bonding pads coupled to the logic elements; identifying a periphery region and a non-periphery region for one of the logic elements; fabricating a through-silicon-via within the periphery region and within the non-periphery region; connecting the through-silicon-via within the periphery region to the through-silicon-via within the non-periphery region through the backside of the semiconductor substrate by a conductive line; and connecting a power source to the through-silicon-via within the periphery region, the through-silicon-via within the periphery region communicating with the through-silicon-via within the non-periphery region through the backside, so as to locate the power source to the non-periphery region on the frontside of the semiconductor substrate.