发明名称 |
High performance pre-mixer buffer in wireless communications systems |
摘要 |
According to one embodiment, a high performance buffer for use in a communications system includes first and second differential blocks. Each of the first and second differential blocks comprise one or more driving transistors for generating a driving current for a load of the high performance buffer, and a feedback path for adjusting the operation of the one or more driving transistors. The feedback path includes a feedback transistor for receiving a common mode bias voltage, wherein the common mode bias voltage depends at least in part on a threshold voltage of the feedback transistor. The feedback path includes a programmable resistor and capacitor to reduce out of band loop gain and the noise. The high performance buffer is configured to achieve a high linearity, low output impedance, and low noise, and is suitable for use as a pre-mixer buffer in a wireless communications system. |
申请公布号 |
US8836374(B2) |
申请公布日期 |
2014.09.16 |
申请号 |
US201113168143 |
申请日期 |
2011.06.24 |
申请人 |
Broadcom Corporation |
发明人 |
Hadji-Abdolhamid Amir;Mirzaei Ahmad;Darabi Hooman |
分类号 |
G01R19/00;H03F3/45;H03K19/00;H03F3/24;H03F3/189;H03F1/02 |
主分类号 |
G01R19/00 |
代理机构 |
Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P. |
代理人 |
Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P. |
主权项 |
1. A buffer for use in a communications system, said buffer comprising:
first and second differential blocks; each of said first and second differential blocks including at least one driving transistor for generating a driving current for a load, a gate of said at least one driving transistor receiving a first common mode bias voltage depending at least in part on a threshold voltage of said at least one driving transistor; a first feedback path configured to adjust an operation of said at least one driving transistor of said first differential block and including a first feedback transistor that receives a second common mode bias voltage of said first feedback path depending at least in part on a threshold voltage of said first feedback transistor; and a second feedback path configured to adjust an operation of said at least one driving transistor of said second differential block and including a second feedback transistor that receives a second common mode bias voltage of said second feedback path depending at least in part on a threshold voltage of said second feedback transistor, wherein the first feedback path is separate from the second feedback path, and the first feedback path includes a voltage divider that provides a divided voltage to a capacitor, and the divided voltage stored on the capacitor controls a control transistor that adjusts the operation of the at least one driving transistor of the first differential block. |
地址 |
Irvine CA US |