Circuits and methods for dynamic allocation of scan test resources

摘要

A method of testing devices under test (DUTs) and testing system are disclosed. The method comprises generating at least one control signal associated with a test pattern structure received from a testing system. The method further comprises selecting M1 number of ports from M number of I/O ports in the DUT to receive scan input corresponding to the test pattern structure based on the control signal, selecting M2 number of ports from the M number of I/O ports to provide scan output based on the control signal, wherein each of M1 and M2 is a number selected from 0 to M, and wherein a sum of M1 and M2 is less than or equal to M. Thereafter, the method comprises performing a scan testing of the DUT based on the scan input provided to the M1 number of ports and receiving the scan output from the M2 number of ports.

主权项

1. A method of testing devices under test (DUTs), at least one DUT comprising N number of scan channels associated with M number of Input/Output (I/O) ports, the method comprising:
generating at least one control signal associated with a test pattern structure, the test pattern structure configured to be implemented to scan test the at least one DUT; selecting M1 number of ports from among the M number of I/O ports so as to receive a scan input corresponding to the test pattern structure based on the at least one control signal; selecting M2 number of ports from among the M number of I/O ports so as to provide a scan output corresponding to the test pattern structure based on the at least one control signal, each of M1 and M2 being a number selected from among a range of numbers between 0 and M, and a sum of M1 and M2 being less than or equal to M; and performing a scan testing of the at least one DUT based on a provision of the scan input to the M1 number of ports and a receipt of the scan output from the M2 number of ports.