MEMORY DEVICE AND THE METHOD OF OPERATING THE SAME

摘要

A memory device is provided. The memory device comprises n-1 frequency demultipliers which create a second demultiply clock or n (n is a natural number satisfying a following equation, n>=2) clocks by demultiplying a first clock; a first delay unit which creates a first demultiply clock which delays the first lock for the same time applied to the second demultiply clock or the n multiply clock for delaying; an MUX unit which receives the first demultiply clock or the n multiply clock and chooses one of the clocks; a flip-flop unit which is connected to the MUX unit, receives and synchronizes the selected demultiply clock and a first signal; and a command decoder unit which decodes the synchronized signal provided from the flip-flop unit and creates internal command signal.