发明名称 |
SIMULTANEOUS SIGNAL RECEPTION WITH INTERSPERSED FREQUENCY ALLOCATION |
摘要 |
Methods and circuits can down convert at least a first RF signal on a first path in a first frequency band to provide a first IF signal. A second RF signal on second path in a second frequency band can be down converted to provide a second IF signal. The first IF signal and the second IF signal are interspersed in the frequency domain, and the first frequency band is different from the second frequency band. A combiner can combine at least part of the first IF signal and the second IF signal to provide a combined signal on an output signal path for reception by a digital processing circuit. The first IF signal or second IF signal can be a Zero IF (ZIF), very low IF (VLIF), or Low IF (LIF) signal. |
申请公布号 |
US2014256278(A1) |
申请公布日期 |
2014.09.11 |
申请号 |
US201313791048 |
申请日期 |
2013.03.08 |
申请人 |
QUALCOMM INCORPORATED |
发明人 |
Ko Jin-Su;Kim Hong Sun;Zhao Liang;Wang Cheng-Han;Farmer Dominic Gerard |
分类号 |
H04B1/16 |
主分类号 |
H04B1/16 |
代理机构 |
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代理人 |
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主权项 |
1. A method for signal processing, comprising:
down converting at least a first RF signal on a first path in a first frequency band to provide a first IF signal comprising a first I component signal and a first Q component signal; down converting at least a second RF signal on a second path in a second frequency band to provide a second IF signal comprising a second I component signal and a second Q component signal, wherein the first IF signal and the second IF signal are interspersed in the frequency domain, the first frequency band being different from the second frequency band; combining the first I component signal and the first Q component signal using a first polyphase filter to provide a third IF signal; combining the second I component signal and the second Q component signal using a second polyphase filter to provide a fourth IF signal; and combining at least part of the third IF signal and the fourth IF signal to provide a combined signal on an output signal path for reception by a digital processing circuit. |
地址 |
San Diego CA US |