| 摘要 |
PROBLEM TO BE SOLVED: To provide: a circuit and a method for controllably delaying an input signal; a microscope; and a method for controlling a microscope.SOLUTION: In a circuit for controllably delaying an input signal, a first delay unit 1 delays an input signal PULS_IN by k cycles of a first clock signal CLK1 so as to generate a value xon the basis of a control value p. A second delay unit 2 includes a converter 3 and a second shift register 4. The converter is connected to the second shift register by n leads. The value xand a value xare present at the converter, the value xbeing the input signal PULS_IN delayed by k-1 cycles of the first clock signal CLK1. The converter is configured such that the value xis present on leads 1 to m and the value xis present on leads m+1 to n (where, 1≤m≤n-1). The second shift register successively outputs values present on leads 1 to n, as an output signal PULS_OUT of the circuit. |
