发明名称 MULTIPLIER CIRCUIT
摘要 A multiplier circuit for multiplying first and second binary values includes a first logic circuit, a priority encoder, a shifter circuit, and an accumulator. The first logic circuit receives the first binary value and a multiplier modifier, and modifies the first binary value based on the multiplier modifier. The multiplier modifier is generated by the priority encoder. The priority encoder also generates a position binary value indicating the position of a most significant set bit in the modified first binary value. The shifter circuit receives the position binary value from the priority encoder and the second binary value and generates an intermediate result. The accumulator accumulates one or more of the intermediate results and generates a final product that is a product of the first and second binary values.
申请公布号 US2014253214(A1) 申请公布日期 2014.09.11
申请号 US201313794739 申请日期 2013.03.11
申请人 Goyal Rohit;Dey Amit Kumar 发明人 Goyal Rohit;Dey Amit Kumar
分类号 G06F7/44 主分类号 G06F7/44
代理机构 代理人
主权项 1. A multiplier circuit for multiplying first and second binary values, comprising: a first logic circuit for receiving the first binary value and a multiplier modifier and resetting a set bit detected in a previous iteration of the multiplier circuit to generate a modified first binary value based on the multiplier modifier; a priority encoder connected to the first logic circuit for receiving the modified first binary value, detecting a most significant set bit in the modified first binary value, generating a position binary value that includes a position of the most significant set bit, and generating the multiplier modifier; a shifter circuit connected to the priority encoder for receiving the second binary value and the position binary value generated in a current iteration of the multiplier circuit, generating a first intermediate product by left-shifting the second binary value by a count equal to the position of the most significant set bit, and generating a result acknowledgement signal when the multiplication of the first and second binary values is finished; and an accumulator connected to the shifter circuit for receiving and accumulating one or more intermediate products generated by the shifter circuit during one or more iterations of the multiplier circuit to generate a final product that is a product of the first and second binary values.
地址 Sirsa IN