Reconfigurable Protocol Tables Within An ASIC

摘要

A high performance computing system is provided with an ASIC that communicates with another device in the system according to a protocol defined by the other device. The ASIC is coupled to a reconfigurable protocol table, in the form of a high speed content-addressable memory (“CAM”). The CAM includes instructions to control the execution of the protocol by the ASIC. The CAM may include instructions to control the ASIC in the event that unanticipated signals or other errors are encountered while executing the protocol. Internal ASIC state data may be routed to the CAM to permit the ASIC to generate a reasonable response to errors either in the design or fabrication of the ASIC or the device with which it is communicating.

主权项

1. A computing node in a high-performance computing system, the computing node comprising:
an electronic device having a port for communicating using a protocol defined by the electronic device; an application-specific integrated circuit (ASIC), coupled to the port, the ASIC having a protocol block for implementing an inter-ASIC communications protocol that has a current protocol state, and at least one other functional block for implementing an intra-ASIC function that has an internal state; and a content-addressable memory (CAM), coupled to the protocol block of the ASIC, the CAM storing a protocol table that maps a current protocol state, an ASIC internal state, and a protocol event onto an action and a next protocol state; the ASIC being configured, in response to receiving indication of an event, to:
send to the CAM data indicating the current protocol state, a portion of the internal state of the intra-ASIC function, and the event,responsively receive from the CAM data indicating a next protocol state and an action,update the current protocol state to be the indicated next protocol state, andexecute the indicated action.