COMBINATION FINFET AND PLANAR FET SEMICONDUCTOR DEVICE AND METHODS OF MAKING SUCH A DEVICE

摘要

A device includes a plurality of trenches and fins defined in a substantially un-doped layer of semiconducting material, a gate insulation layer positioned on the fins and on the bottom of the trenches, a gate electrode and a device isolation structure. One method disclosed herein involves identifying a top width of each of a plurality of fins and a depth of a plurality of trenches to be formed in a substantially un-doped layer of semiconducting material, wherein, during operation, the device is adapted to operate in at least three distinguishable conditions depending upon a voltage applied to the device, performing at least one process operation to define the trenches and fins in the layer of semiconducting material, forming a gate insulation layer on the fins and on a bottom of the trenches and forming a gate electrode above the gate insulation layer.

主权项

1. A device, comprising:
a substantially un-doped layer of a semiconducting material; a plurality of trenches defined in said substantially un-doped layer of semiconducting material, said trenches defining a plurality of fins; a gate insulation layer positioned on said fins and on a bottom surface of said trenches; a gate electrode positioned on said gate insulation layer; and a device isolation structure defined in said substantially un-doped layer of semiconducting material.