WAFER STRUCTURE AND POWER DEVICE USING THE SAME

摘要

In one embodiment, a method of making a super-junction MOS transistor in a wafer can include: (i) forming a first doping layer having a high doping concentration; (ii) forming a second doping layer on the first doping layer, wherein a doping concentration of the second doping layer is less than a doping concentration of the first doping layer; (iii) forming a third doping layer on the second doping layer, wherein the third doping layer comprises an intrinsic layer; (iv) etching through the third doping layer and partially through the second doping layer to form trenches; and (v) filling the trenches to form pillar structures.

主权项

1. A wafer structure for a power device, the wafer structure comprising:
a) a first doping layer having a high doping concentration; b) a second doping layer on said first doping layer, wherein a doping concentration of said second doping layer is less than said high doping concentration; and c) a third doping layer on said second doping layer, wherein a doping concentration of said third doping layer is less than said doping concentration of said second doping layer.