发明名称 MEMORY SYSTEMS AND METHODS FOR CONTROLLING THE TIMING OF RECEIVING READ DATA
摘要 Embodiments of the present invention provide memory systems having a plurality of memory devices sharing an interface for the transmission of read data. A controller can identify consecutive read requests sent to different memory devices. To avoid data contention on the interface, for example, the controller can be configured to delay the time until read data corresponding to the second read request is placed on the interface.
申请公布号 US2014258666(A1) 申请公布日期 2014.09.11
申请号 US201414280861 申请日期 2014.05.19
申请人 MICRON TECHNOLOGY, INC. 发明人 LaBerge Paul A.;Johnson James B.
分类号 G06F3/06 主分类号 G06F3/06
代理机构 代理人
主权项 1. An apparatus, comprising: a plurality of memory devices; and a controller coupled to each of the plurality of memory devices and configured to receive first and second commands consecutively, the controller further configured to provide the first command to a first memory device of the plurality of memory devices and further configured to provide the second command with a first delay responsive to the second command being associated with the first memory device and to provide the second command with a second delay responsive to the second command being associated with a second memory device of the plurality of memory devices.
地址 BOISE ID US